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authorMika Westerberg <mika.westerberg@linux.intel.com>2014-11-03 12:01:33 +0100
committerLinus Walleij <linus.walleij@linaro.org>2014-11-04 11:21:02 +0100
commit6e08d6bbebebcf70f982d7190c4b6dc456cedd57 (patch)
tree728061495abb0cb39a6f2253648cb4f9e82d7812 /drivers/pinctrl/intel/Kconfig
parentgpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod() (diff)
downloadlinux-6e08d6bbebebcf70f982d7190c4b6dc456cedd57.tar.xz
linux-6e08d6bbebebcf70f982d7190c4b6dc456cedd57.zip
pinctrl: Add Intel Cherryview/Braswell pin controller support
This driver supports the pin/GPIO controllers found in newer Intel SoCs like Cherryview and Braswell. The driver provides full GPIO support and minimal set of pin controlling funtionality. The driver is based on the original Cherryview GPIO driver authored by Ning Li and Alan Cox. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/Kconfig')
-rw-r--r--drivers/pinctrl/intel/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig
index 957c90386307..b801d869e91c 100644
--- a/drivers/pinctrl/intel/Kconfig
+++ b/drivers/pinctrl/intel/Kconfig
@@ -13,3 +13,15 @@ config PINCTRL_BAYTRAIL
so only a small amount is available for gpio use.
Requires ACPI device enumeration code to set up a platform device.
+
+config PINCTRL_CHERRYVIEW
+ tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
+ depends on ACPI
+ select PINMUX
+ select PINCONF
+ select GENERIC_PINCONF
+ select GPIOLIB
+ select GPIOLIB_IRQCHIP
+ help
+ Cherryview/Braswell pinctrl driver provides an interface that
+ allows configuring of SoC pins and using them as GPIOs.