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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2017-06-06 15:18:18 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-06-09 13:02:50 +0200 |
| commit | 1f6b419b24285409a9365461bf7367a220eff1db (patch) | |
| tree | b0c0b97d3d8aa431b63e97576edb083e75c4096d /drivers/pinctrl/intel/pinctrl-intel.c | |
| parent | pinctrl: intel: Add support for variable size pad groups (diff) | |
| download | linux-1f6b419b24285409a9365461bf7367a220eff1db.tar.xz linux-1f6b419b24285409a9365461bf7367a220eff1db.zip | |
pinctrl: intel: Make it possible to specify mode per pin in a group
On some SoCs not all pins in a group use the same mode when a certain
function is muxed out of them. This makes it possible to specify mode per
pin as an array instead in addition to single integer.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-intel.c')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-intel.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 78c48497c9e6..6dc1096d3d34 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -398,7 +398,11 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function, value = readl(padcfg0); value &= ~PADCFG0_PMODE_MASK; - value |= grp->mode << PADCFG0_PMODE_SHIFT; + + if (grp->modes) + value |= grp->modes[i] << PADCFG0_PMODE_SHIFT; + else + value |= grp->mode << PADCFG0_PMODE_SHIFT; writel(value, padcfg0); } |