diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-11-25 18:19:56 +0100 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-12-13 15:48:48 +0100 |
| commit | 03fb681badafa3035d2af4cb48870f69ad993dcb (patch) | |
| tree | 26055fe2313284e8fe4f5e1138047c4a80c2c100 /drivers/pinctrl/intel | |
| parent | pinctrl: lynxpoint: Assume 2 bits for mode selector (diff) | |
| download | linux-03fb681badafa3035d2af4cb48870f69ad993dcb.tar.xz linux-03fb681badafa3035d2af4cb48870f69ad993dcb.zip | |
pinctrl: lynxpoint: Relax GPIO request rules
A pin in native mode still can be requested as GPIO, though we assume
that firmware has configured it properly, which sometimes is not the case.
Here we allow turning the pin as GPIO to avoid potential issues,
but issue warning that something might be wrong.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-lynxpoint.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 4b2e3f298641..3ac95f9d6a7f 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -104,6 +104,7 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); unsigned long acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED); + u32 value; pm_runtime_get(&lg->pdev->dev); /* should we put if failed */ @@ -112,9 +113,16 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) dev_err(&lg->pdev->dev, "gpio %d reserved for ACPI\n", offset); return -EBUSY; } - /* Fail if pin is in alternate function mode (not GPIO mode) */ - if ((inl(reg) & USE_SEL_MASK) != USE_SEL_GPIO) - return -ENODEV; + + /* + * Reconfigure pin to GPIO mode if needed and issue a warning, + * since we expect firmware to configure it properly. + */ + value = inl(reg); + if ((value & USE_SEL_MASK) != USE_SEL_GPIO) { + outl((value & USE_SEL_MASK) | USE_SEL_GPIO, reg); + dev_warn(&lg->pdev->dev, FW_BUG "pin %u forcibly reconfigured as GPIO\n", offset); + } /* enable input sensing */ outl(inl(conf2) & ~GPINDIS_BIT, conf2); |