diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-09-26 16:50:27 +0200 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-12-13 15:48:48 +0100 |
| commit | c35f463a966221f3d6c6bc48fbea27a8d68aafc3 (patch) | |
| tree | d4ac8ea325c945bafdb72264ec44123c905d3e42 /drivers/pinctrl/intel | |
| parent | pinctrl: lynxpoint: Switch to memory mapped IO accessors (diff) | |
| download | linux-c35f463a966221f3d6c6bc48fbea27a8d68aafc3.tar.xz linux-c35f463a966221f3d6c6bc48fbea27a8d68aafc3.zip | |
pinctrl: lynxpoint: Convert unsigned to unsigned int
Simple type conversion with no functional change implied.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-lynxpoint.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 4ed2d4daea19..3c8241ed8bc2 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -82,7 +82,7 @@ struct lp_gpio { * LP94_CONFIG2 (gpio 94) ... */ -static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned offset, +static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned int offset, int reg) { struct lp_gpio *lg = gpiochip_get_data(chip); @@ -98,7 +98,7 @@ static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned offset, return lg->regs + reg + reg_offset; } -static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) +static int lp_gpio_request(struct gpio_chip *chip, unsigned int offset) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -131,7 +131,7 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) return 0; } -static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) +static void lp_gpio_free(struct gpio_chip *chip, unsigned int offset) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); @@ -142,7 +142,7 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) pm_runtime_put(lg->dev); } -static int lp_irq_type(struct irq_data *d, unsigned type) +static int lp_irq_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct lp_gpio *lg = gpiochip_get_data(gc); @@ -185,13 +185,13 @@ static int lp_irq_type(struct irq_data *d, unsigned type) return 0; } -static int lp_gpio_get(struct gpio_chip *chip, unsigned offset) +static int lp_gpio_get(struct gpio_chip *chip, unsigned int offset) { void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); return !!(ioread32(reg) & IN_LVL_BIT); } -static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +static void lp_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -207,7 +207,7 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) raw_spin_unlock_irqrestore(&lg->lock, flags); } -static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -220,8 +220,8 @@ static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) return 0; } -static int lp_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) +static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, + int value) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -255,7 +255,7 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) pending = ioread32(reg) & ioread32(ena); for_each_set_bit(pin, &pending, 32) { - unsigned irq; + unsigned int irq; /* Clear before handling so we don't lose an edge */ iowrite32(BIT(pin), reg); @@ -315,7 +315,7 @@ static int lp_gpio_irq_init_hw(struct gpio_chip *chip) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg; - unsigned base; + unsigned int base; for (base = 0; base < lg->chip.ngpio; base += 32) { /* disable gpio pin interrupts */ @@ -390,7 +390,7 @@ static int lp_gpio_probe(struct platform_device *pdev) GFP_KERNEL); if (!girq->parents) return -ENOMEM; - girq->parents[0] = (unsigned)irq_rc->start; + girq->parents[0] = (unsigned int)irq_rc->start; girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_bad_irq; } |