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| author | Sam Shih <sam.shih@mediatek.com> | 2021-09-14 10:51:32 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-09-16 12:06:28 +0200 |
| commit | d8b94c9ff96c2024a527086d850eb0b314337ff9 (patch) | |
| tree | 56601f6b0f74cac5a11723a3578b9989719688fe /drivers/pinctrl/mediatek | |
| parent | Linux 5.15-rc1 (diff) | |
| download | linux-d8b94c9ff96c2024a527086d850eb0b314337ff9.tar.xz linux-d8b94c9ff96c2024a527086d850eb0b314337ff9.zip | |
pinctrl: mediatek: moore: check if pin_desc is valid before use
Certain SoC are missing the middle part gpios in consecutive pins,
it's better to check if mtk_pin_desc is a valid pin for the extensibility
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Link: https://lore.kernel.org/r/20210914085137.31761-5-sam.shih@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mediatek')
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-moore.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c index 3a4a23c40a71..ad3b67163973 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -60,6 +60,8 @@ static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, int pin = grp->pins[i]; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; + if (!desc->name) + return -ENOTSUPP; mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, pin_modes[i]); @@ -76,6 +78,8 @@ static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, const struct mtk_pin_desc *desc; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; + if (!desc->name) + return -ENOTSUPP; return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, hw->soc->gpio_m); @@ -89,6 +93,8 @@ static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, const struct mtk_pin_desc *desc; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; + if (!desc->name) + return -ENOTSUPP; /* hardware would take 0 as input direction */ return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); @@ -103,6 +109,8 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, const struct mtk_pin_desc *desc; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; + if (!desc->name) + return -ENOTSUPP; switch (param) { case PIN_CONFIG_BIAS_DISABLE: @@ -218,6 +226,8 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, int cfg, err = 0; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; + if (!desc->name) + return -ENOTSUPP; for (cfg = 0; cfg < num_configs; cfg++) { param = pinconf_to_config_param(configs[cfg]); @@ -435,6 +445,8 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) int value, err; desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; + if (!desc->name) + return -ENOTSUPP; err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); if (err) @@ -449,6 +461,10 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) const struct mtk_pin_desc *desc; desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; + if (!desc->name) { + dev_err(hw->dev, "Failed to set gpio %d\n", gpio); + return; + } mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); } @@ -490,6 +506,8 @@ static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, u32 debounce; desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; + if (!desc->name) + return -ENOTSUPP; if (!hw->eint || pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || |