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author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-01-08 17:28:43 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2019-01-21 14:12:50 +0100 |
commit | f4f1b074691288d024a72601463011b6afd8ac75 (patch) | |
tree | ccd5ddce025a58235b68a9572645f94394ff3b62 /drivers/pinctrl/mvebu | |
parent | pinctrl: meson: meson8b: add the eth_rxd2 and eth_rxd3 pins (diff) | |
download | linux-f4f1b074691288d024a72601463011b6afd8ac75.tar.xz linux-f4f1b074691288d024a72601463011b6afd8ac75.zip |
pinctrl: armada-37xx: change suspend/resume time
Armada 3700 PCIe IP relies on the pinctrl IP managed by this
driver. For reasons related to the PCI core's organization when
suspending/resuming, PCI host controller drivers must reconfigure
their register at suspend_noirq()/resume_noirq() which happens after
suspend()/suspend_late() and before resume_early()/resume().
In the current state, after resuming from a suspend to RAM cycle the
PCIe IP is reconfigured before the pinctrl one which produces an
interrupt storm. The solution to support PCIe resume operation is to
change the "priority" of this pinctrl driver PM callbacks to
"_noirq()".
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mvebu')
-rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 4b9f2cf94431..6462d3ca7ceb 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -1107,8 +1107,8 @@ static int armada_3700_pinctrl_resume(struct device *dev) * to other IO drivers. */ static const struct dev_pm_ops armada_3700_pinctrl_pm_ops = { - .suspend_late = armada_3700_pinctrl_suspend, - .resume_early = armada_3700_pinctrl_resume, + .suspend_noirq = armada_3700_pinctrl_suspend, + .resume_noirq = armada_3700_pinctrl_resume, }; #define PINCTRL_ARMADA_37XX_DEV_PM_OPS (&armada_3700_pinctrl_pm_ops) |