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authorQuentin Schulz <quentin.schulz@free-electrons.com>2017-12-05 15:46:44 +0100
committerLinus Walleij <linus.walleij@linaro.org>2017-12-07 10:07:19 +0100
commit48e706fbc546d63148a762aadf92f412eefe8b8e (patch)
treee3311f77fcc0f04d434315ea5095a18b961910c2 /drivers/pinctrl/pinctrl-axp209.c
parentpinctrl: axp209: rename everything from gpio to pctl (diff)
downloadlinux-48e706fbc546d63148a762aadf92f412eefe8b8e.tar.xz
linux-48e706fbc546d63148a762aadf92f412eefe8b8e.zip
pinctrl: axp209: add programmable gpio_status_offset
To prepare for patches that will add support for a new PMIC that has a different GPIO input status register, add a gpio_status_offset within axp20x_pctl structure and use it. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-axp209.c')
-rw-r--r--drivers/pinctrl/pinctrl-axp209.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c
index 17eeb0410a5b..db8e319b6e11 100644
--- a/drivers/pinctrl/pinctrl-axp209.c
+++ b/drivers/pinctrl/pinctrl-axp209.c
@@ -48,6 +48,7 @@ struct axp20x_pctrl_desc {
u8 ldo_mask;
/* Stores the pins supporting ADC function. Bit offset is pin number. */
u8 adc_mask;
+ u8 gpio_status_offset;
};
struct axp20x_pinctrl_function {
@@ -77,6 +78,7 @@ static const struct axp20x_pctrl_desc axp20x_data = {
.npins = ARRAY_SIZE(axp209_pins),
.ldo_mask = BIT(0) | BIT(1),
.adc_mask = BIT(0) | BIT(1),
+ .gpio_status_offset = 4,
};
static int axp20x_gpio_get_reg(unsigned int offset)
@@ -108,7 +110,7 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
if (ret)
return ret;
- return !!(val & BIT(offset + 4));
+ return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
}
static int axp20x_gpio_get_direction(struct gpio_chip *chip,