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authorGeert Uytterhoeven <geert+renesas@glider.be>2023-03-08 11:42:38 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2023-03-30 15:39:04 +0200
commita3ca1e18931e60c9f1765f630b677cad8372d1b7 (patch)
tree68fc4be44bd9c50e0cb47f7abe5faad99a1445fb /drivers/pinctrl/pinctrl-keembay.c
parentpinctrl: renesas: r8a77995: Retain POCCTRL0 register across suspend/resume (diff)
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pinctrl: renesas: rcar: Phase out old SH_PFC_PIN_CFG_IO_VOLTAGE flag
Commit 537db25ca330dce0 ("pinctrl: renesas: Add I/O voltage level flag") introduced new flags to support pins that can switch their voltage levels between either 1.8V and 3.3V, or between 2.5V and 3.3V. The old SH_PFC_PIN_CFG_IO_VOLTAGE flag was retained to avoid having to change existing drivers. Replace SH_PFC_PIN_CFG_IO_VOLTAGE by SH_PFC_PIN_CFG_IO_VOLTAGE_18_33, to make the voltage configuration explicit, and to prepare for the advent of support for more voltage levels. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ae5f879c093f3e3cd50ba1495975bccfad81237b.1678271030.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl/pinctrl-keembay.c')
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