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authorTomasz Figa <t.figa@samsung.com>2012-10-11 10:11:16 +0200
committerLinus Walleij <linus.walleij@linaro.org>2012-10-15 09:10:12 +0200
commit595be7268a85735d229451821b56f122d09d7bdc (patch)
treeeefa13ddc638a1fc5e987dee179ac951aea7b90b /drivers/pinctrl/pinctrl-samsung.c
parentpinctrl: samsung: Include bank-specific eint offset in bank struct (diff)
downloadlinux-595be7268a85735d229451821b56f122d09d7bdc.tar.xz
linux-595be7268a85735d229451821b56f122d09d7bdc.zip
pinctrl: exynos: Use one IRQ domain per pin bank
Instead of registering one IRQ domain for all pin banks of a pin controller, this patch implements registration of per-bank domains. At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts of Exynos4x12) it simplifies driver code and device tree sources, because GPIO interrupts can be now specified per banks. Example: device { /* ... */ interrupt-parent = <&gpa1>; interrupts = <3 0>; /* ... */ }; Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-samsung.c')
-rw-r--r--drivers/pinctrl/pinctrl-samsung.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c
index 53493c3c35ff..e1ef5d28094d 100644
--- a/drivers/pinctrl/pinctrl-samsung.c
+++ b/drivers/pinctrl/pinctrl-samsung.c
@@ -813,10 +813,6 @@ static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
bank->drvdata = d;
bank->pin_base = ctrl->nr_pins;
ctrl->nr_pins += bank->nr_pins;
- if (bank->eint_type == EINT_TYPE_GPIO) {
- bank->irq_base = ctrl->nr_gint;
- ctrl->nr_gint += bank->nr_pins;
- }
}
for_each_child_of_node(node, np) {