summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/pinctrl-single.c
diff options
context:
space:
mode:
authorTony Lindgren <tony@atomide.com>2016-05-31 23:17:06 +0200
committerLinus Walleij <linus.walleij@linaro.org>2016-06-22 17:58:07 +0200
commit0ac3c0a4025f41748a083bdd4970cb3ede802b15 (patch)
tree45a0b3413cbe8c3d67b59709cbb67d7e7648005e /drivers/pinctrl/pinctrl-single.c
parentpinctrl: imx: Do not treat a PIN without MUX register as an error (diff)
downloadlinux-0ac3c0a4025f41748a083bdd4970cb3ede802b15.tar.xz
linux-0ac3c0a4025f41748a083bdd4970cb3ede802b15.zip
pinctrl: single: Fix missing flush of posted write for a wakeirq
With many repeated suspend resume cycles, the pin specific wakeirq may not always work on omaps. This is because the write to enable the pin interrupt may not have reached the device over the interconnect before suspend happens. Let's fix the issue with a flush of posted write with a readback. Cc: stable@vger.kernel.org Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-single.c')
-rw-r--r--drivers/pinctrl/pinctrl-single.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index cf9bafa10acf..bfdf720db270 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -1580,6 +1580,9 @@ static inline void pcs_irq_set(struct pcs_soc_data *pcs_soc,
else
mask &= ~soc_mask;
pcs->write(mask, pcswi->reg);
+
+ /* flush posted write */
+ mask = pcs->read(pcswi->reg);
raw_spin_unlock(&pcs->lock);
}