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authorStephen Warren <swarren@nvidia.com>2014-04-15 19:02:03 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-04-22 16:55:41 +0200
commit443ac9530286f9d874e23b7f7b60c70155a0fef9 (patch)
tree02e4c16852d1bde6434373a821c317aa76fa9551 /drivers/pinctrl/pinctrl-tegra.h
parentpinctrl: tegra: print better error messages (diff)
downloadlinux-443ac9530286f9d874e23b7f7b60c70155a0fef9.tar.xz
linux-443ac9530286f9d874e23b7f7b60c70155a0fef9.zip
pinctrl: tegra: add missing kerneldoc
The kerneldoc for struct tegra_pingroup didn't describe all of the fields in the struct. Add some extra kerneldoc to fix that. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra.h')
-rw-r--r--drivers/pinctrl/pinctrl-tegra.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h
index 24c5a91230bb..8d94d1332e7b 100644
--- a/drivers/pinctrl/pinctrl-tegra.h
+++ b/drivers/pinctrl/pinctrl-tegra.h
@@ -78,6 +78,10 @@ struct tegra_function {
/**
* struct tegra_pingroup - Tegra pin group
+ * @name The name of the pin group.
+ * @pins An array of pin IDs included in this pin group.
+ * @npins The number of entries in @pins.
+ * @funcs The mux functions which can be muxed onto this group.
* @mux_reg: Mux register offset.
* This register contains the mux, einput, odrain, lock,
* ioreset, rcv_sel parameters.