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authorMika Westerberg <mika.westerberg@linux.intel.com>2017-01-27 11:07:14 +0100
committerLinus Walleij <linus.walleij@linaro.org>2017-01-30 15:01:35 +0100
commite57725eabf87c9c75bc73bd19ea00e887155e43f (patch)
tree93e55ff43d92764fd78a4810d531050a5eb5259f /drivers/pinctrl/qcom/pinctrl-msm.h
parentMerge tag 'sh-pfc-for-v4.11-tag2' of git://git.kernel.org/pub/scm/linux/kerne... (diff)
downloadlinux-e57725eabf87c9c75bc73bd19ea00e887155e43f.tar.xz
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pinctrl: intel: Add support for hardware debouncer
The next generation Intel GPIO hardware has two additional registers PADCFG2 and PADCFG3. The latter is marked as reserved but the former includes configuration for per-pad hardware debouncer. This patch adds support for that in the Intel pinctrl core driver. Since these are additional features on top of the current generation hardware, we use revision number and feature flags to enable this if detected. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/qcom/pinctrl-msm.h')
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