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author | Ulrich Hecht <uli+renesas@fpond.eu> | 2021-01-12 17:59:10 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-01-14 12:06:15 +0100 |
commit | 741a7370fc3b8b549ac69886be161a99109b78b6 (patch) | |
tree | f1bba2a0598e1f94f9d4527a89f2929e846f0bf0 /drivers/pinctrl/renesas/sh_pfc.h | |
parent | pinctrl: renesas: Add PORT_GP_CFG_{2,31} macros (diff) | |
download | linux-741a7370fc3b8b549ac69886be161a99109b78b6.tar.xz linux-741a7370fc3b8b549ac69886be161a99109b78b6.zip |
pinctrl: renesas: Initial R8A779A0 (V3U) PFC support
This patch adds initial pinctrl support for the R8A779A0 (V3U) SoC,
including bias, drive strength and voltage control.
Based on patch by LUU HOAI <hoai.luu.ub@renesas.com>.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210112165912.30876-5-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/renesas/sh_pfc.h')
-rw-r--r-- | drivers/pinctrl/renesas/sh_pfc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 18b23182ff3a..5934faeb23d7 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -340,6 +340,7 @@ extern const struct sh_pfc_soc_info r8a77970_pinmux_info; extern const struct sh_pfc_soc_info r8a77980_pinmux_info; extern const struct sh_pfc_soc_info r8a77990_pinmux_info; extern const struct sh_pfc_soc_info r8a77995_pinmux_info; +extern const struct sh_pfc_soc_info r8a779a0_pinmux_info; extern const struct sh_pfc_soc_info sh7203_pinmux_info; extern const struct sh_pfc_soc_info sh7264_pinmux_info; extern const struct sh_pfc_soc_info sh7269_pinmux_info; |