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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-10-16 09:46:12 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-11-06 09:20:26 +0100
commit50f3f2d73e3426ba5aac0fe62098870579a0b357 (patch)
tree9a5f5bff94377bb10e60bf52b91d73a2be059a1a /drivers/pinctrl/sh-pfc/pfc-r8a7794.c
parentMAINTAINERS: Add Renesas RZ/A and RZ/N files to Renesas pinctrl section (diff)
downloadlinux-50f3f2d73e3426ba5aac0fe62098870579a0b357.tar.xz
linux-50f3f2d73e3426ba5aac0fe62098870579a0b357.zip
pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels
Some VIN channels support less than 24 lanes. As union vin_data always consumes space for 24 lanes, this wastes memory. Hence introduce new smaller unions vin_data12 and vin_data16, to accommodate VIN channels with only 12 or 16 lanes. This reduces the static pin controller driver size by 320 bytes for R-Car V2H, and by 96 bytes for R-Car E2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7794.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7794.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
index 6d1e5fdc03f8..b96a3cc79084 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -3704,7 +3704,7 @@ static const unsigned int vin0_clk_mux[] = {
VI0_CLK_MARK,
};
/* - VIN1 ------------------------------------------------------------------- */
-static const union vin_data vin1_data_pins = {
+static const union vin_data12 vin1_data_pins = {
.data12 = {
RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),
RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
@@ -3714,7 +3714,7 @@ static const union vin_data vin1_data_pins = {
RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
},
};
-static const union vin_data vin1_data_mux = {
+static const union vin_data12 vin1_data_mux = {
.data12 = {
VI1_DATA0_MARK, VI1_DATA1_MARK,
VI1_DATA2_MARK, VI1_DATA3_MARK,