diff options
| author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2017-11-17 11:41:23 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-12-05 14:14:55 +0100 |
| commit | c45985d359c40899ef05e44bb24a63241afaec10 (patch) | |
| tree | e31337ca556beaf5868cba0db84d3269e906f6df /drivers/pinctrl/sh-pfc/pfc-r8a77995.c | |
| parent | pinctrl: sh-pfc: r8a7796: Rename RTS{0,1,3,4}# pin function definitions (diff) | |
| download | linux-c45985d359c40899ef05e44bb24a63241afaec10.tar.xz linux-c45985d359c40899ef05e44bb24a63241afaec10.zip | |
pinctrl: sh-pfc: r8a77995: Add CAN support
This patch adds CAN[0-1] pinmux support to the r8a77995 SoC.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a77995.c')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c index 2c9a71a59fc3..c4ea718e172e 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c @@ -1059,6 +1059,45 @@ static const unsigned int avb0_avtp_capture_b_mux[] = { AVB0_AVTP_CAPTURE_B_MARK, }; +/* - CAN ------------------------------------------------------------------ */ +static const unsigned int can0_data_a_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 31), +}; +static const unsigned int can0_data_a_mux[] = { + CAN0_TX_A_MARK, CAN0_RX_A_MARK, +}; +static const unsigned int can0_data_b_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 5), +}; +static const unsigned int can0_data_b_mux[] = { + CAN0_TX_B_MARK, CAN0_RX_B_MARK, +}; +static const unsigned int can1_data_a_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 29), +}; +static const unsigned int can1_data_a_mux[] = { + CAN1_TX_A_MARK, CAN1_RX_A_MARK, +}; +static const unsigned int can1_data_b_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 6), +}; +static const unsigned int can1_data_b_mux[] = { + CAN1_TX_B_MARK, CAN1_RX_B_MARK, +}; + +/* - CAN Clock -------------------------------------------------------------- */ +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(5, 2), +}; +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + /* - I2C -------------------------------------------------------------------- */ static const unsigned int i2c0_pins[] = { /* SCL, SDA */ @@ -1506,6 +1545,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb0_avtp_pps_b), SH_PFC_PIN_GROUP(avb0_avtp_match_b), SH_PFC_PIN_GROUP(avb0_avtp_capture_b), + SH_PFC_PIN_GROUP(can0_data_a), + SH_PFC_PIN_GROUP(can0_data_b), + SH_PFC_PIN_GROUP(can1_data_a), + SH_PFC_PIN_GROUP(can1_data_b), + SH_PFC_PIN_GROUP(can_clk), SH_PFC_PIN_GROUP(i2c0), SH_PFC_PIN_GROUP(i2c1), SH_PFC_PIN_GROUP(i2c2_a), @@ -1583,6 +1627,18 @@ static const char * const avb0_groups[] = { "avb0_avtp_capture_b", }; +static const char * const can0_groups[] = { + "can0_data_a", + "can0_data_b", +}; +static const char * const can1_groups[] = { + "can1_data_a", + "can1_data_b", +}; +static const char * const can_clk_groups[] = { + "can_clk", +}; + static const char * const i2c0_groups[] = { "i2c0", }; @@ -1693,6 +1749,9 @@ static const char * const usb0_groups[] = { static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(avb0), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(i2c0), SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2), |