diff options
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2016-06-06 18:08:25 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-06-10 09:00:19 +0200 |
| commit | 8775306dcf48092ff9520463699f8fb373ceb57e (patch) | |
| tree | 0eb508dcb23e771a0a3234539fb0332341c49d3f /drivers/pinctrl/sh-pfc/sh_pfc.h | |
| parent | Linux 4.7-rc1 (diff) | |
| download | linux-8775306dcf48092ff9520463699f8fb373ceb57e.tar.xz linux-8775306dcf48092ff9520463699f8fb373ceb57e.zip | |
pinctrl: sh-pfc: refactor voltage setting
All known hardware being able to switch voltages has the same POCCTRL
register. So, factor out the common code to the core and keep only
the pin-to-bit mapping SoC specific. Convert the only user, r8a7790.
In case POCCTRL should ever get more complex (more voltages to select?),
we should probably switch over to a describing array like drive strength
does currently.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/sh_pfc.h')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/sh_pfc.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 656ea32f776c..ea3a52751455 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -189,9 +189,7 @@ struct sh_pfc_soc_operations { unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin); void (*set_bias)(struct sh_pfc *pfc, unsigned int pin, unsigned int bias); - int (*get_io_voltage)(struct sh_pfc *pfc, unsigned int pin); - int (*set_io_voltage)(struct sh_pfc *pfc, unsigned int pin, - u16 voltage_mV); + int (*pin_to_pocctrl)(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl); }; struct sh_pfc_soc_info { |