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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-07-25 14:42:08 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-07-29 23:28:44 +0200 |
| commit | 55aedef50d4d810670916d9fce4a40d5da2079e7 (patch) | |
| tree | 469a24989a9c682809fc581810a0387181a4f746 /drivers/pinctrl/tegra/pinctrl-tegra114.c | |
| parent | pinctrl: imx: off by one in imx_pinconf_group_dbg_show() (diff) | |
| download | linux-55aedef50d4d810670916d9fce4a40d5da2079e7.tar.xz linux-55aedef50d4d810670916d9fce4a40d5da2079e7.zip | |
pinctrl: intel: Do pin translation when lock IRQ
Default GPIOLIB callbacks for request and release IRQ do not do a GPIO
to pin translation which is necessary for Intel hardware, such as Intel
Cannonlake. Absence of the translation prevents some pins to be locked
as IRQ due to direction check. Introduce own callbacks to make
translation possible to avoid above issue.
Fixes: a60eac3239f0 ("pinctrl: intel: Allow custom GPIO base for pad groups")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra114.c')
0 files changed, 0 insertions, 0 deletions