diff options
| author | Rhyland Klein <rklein@nvidia.com> | 2016-04-07 23:37:08 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-04-14 14:01:25 +0200 |
| commit | 26e6aaafc8a1e862437003d6e06ba748e7177ea8 (patch) | |
| tree | 04ff0595a8c41c7a2dfa54a5bd59212cc0a9b4e6 /drivers/pinctrl/tegra/pinctrl-tegra30.c | |
| parent | pinctrl: rockchip: add support the get_direction (diff) | |
| download | linux-26e6aaafc8a1e862437003d6e06ba748e7177ea8.tar.xz linux-26e6aaafc8a1e862437003d6e06ba748e7177ea8.zip | |
pinctrl: tegra: clear park bit for all pins
Parking bits might not be cleared by the bootloader properly (if for
instance it doesn't use the device configured by that pin). Clear
the park bits for all the pins during pinctrl probe.
This is present on T210 platforms but not earlier ones, so for earlier
generations, set parked_reg = -1 to disable.
The park bit is used to prevent glitching when reprogramming pinctrl
registers.
Based on work by:
Shravani Dingari <shravanid@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra30.c')
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra30.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra30.c b/drivers/pinctrl/tegra/pinctrl-tegra30.c index 47b2fd8bb2e9..4dc9642c914a 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra30.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra30.c @@ -2139,6 +2139,7 @@ static struct tegra_function tegra30_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = -1, \ + .parked_reg = -1, \ .drv_reg = -1, \ } @@ -2159,6 +2160,7 @@ static struct tegra_function tegra30_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ + .parked_reg = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ |