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authorSowjanya Komatineni <skomatineni@nvidia.com>2019-08-16 21:41:47 +0200
committerLinus Walleij <linus.walleij@linaro.org>2019-08-21 09:00:16 +0200
commita4873accca0529b6a32e1ceb458be843cdea9ec6 (patch)
tree2f38cc64e08ba10242d471221f6c08ba1545c8b0 /drivers/pinctrl/tegra
parentpinctrl: tegra: Fix write barrier placement in pmx_writel (diff)
downloadlinux-a4873accca0529b6a32e1ceb458be843cdea9ec6.tar.xz
linux-a4873accca0529b6a32e1ceb458be843cdea9ec6.zip
pinctrl: tegra: Flush pinctrl writes during resume
This patch adds pinctrl register read to flush all the prior pinctrl writes and then adds barrier for pinctrl register read to complete during resume to make sure all pinctrl changes are effective. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1565984527-5272-3-git-send-email-skomatineni@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra')
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 5e3c00137d71..e9a7cbb9aa33 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -677,6 +677,10 @@ static int tegra_pinctrl_resume(struct device *dev)
writel_relaxed(*backup_regs++, regs++);
}
+ /* flush all the prior writes */
+ readl_relaxed(pmx->regs[0]);
+ /* wait for pinctrl register read to complete */
+ rmb();
return 0;
}