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authorSowjanya Komatineni <skomatineni@nvidia.com>2019-08-16 21:41:46 +0200
committerLinus Walleij <linus.walleij@linaro.org>2019-08-21 09:00:16 +0200
commitc2cf351eba2ff6002ce8eb178452219d2521e38e (patch)
treefc0b02b504a7f680247f963623d3c1fa480ee9a2 /drivers/pinctrl/tegra
parentpinctrl: bcm-iproc: Pass irqchip when adding gpiochip (diff)
downloadlinux-c2cf351eba2ff6002ce8eb178452219d2521e38e.tar.xz
linux-c2cf351eba2ff6002ce8eb178452219d2521e38e.zip
pinctrl: tegra: Fix write barrier placement in pmx_writel
pmx_writel uses writel which inserts write barrier before the register write. This patch has fix to replace writel with writel_relaxed followed by a readback and memory barrier to ensure write operation is completed for successful pinctrl change. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1565984527-5272-2-git-send-email-skomatineni@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra')
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index e3a237534281..5e3c00137d71 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -32,7 +32,9 @@ static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg)
static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg)
{
- writel(val, pmx->regs[bank] + reg);
+ writel_relaxed(val, pmx->regs[bank] + reg);
+ /* make sure pinmux register write completed */
+ pmx_readl(pmx, bank, reg);
}
static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)