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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-03-15 18:38:14 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-03-23 10:09:43 +0100 |
| commit | 8ef364b3cee9d89a13549652d646bc5e61440d86 (patch) | |
| tree | 14a5a2e9cddd6e9025615488b32a6ef30578431c /drivers/pinctrl/uniphier/pinctrl-uniphier.h | |
| parent | pinctrl: meson: gxl: add the missing PWM pin definitions (diff) | |
| download | linux-8ef364b3cee9d89a13549652d646bc5e61440d86.tar.xz linux-8ef364b3cee9d89a13549652d646bc5e61440d86.zip | |
pinctrl: uniphier: remove obsoleted compatibles
Since commit 3e030b0b4e46 ("pinctrl: uniphier: allow to have pinctrl
node under syscon node"), this driver has kept compatibility for the
old DT files. Several releases have passed since then, so remove
the obsoleted compatibles and clean up the code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier.h | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 923f36cb245d..6f2f33bf788f 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,14 +23,6 @@ struct platform_device; -#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 -#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 -#define UNIPHIER_PINCTRL_DRVCTRL_BASE 0x800 -#define UNIPHIER_PINCTRL_DRV2CTRL_BASE 0x900 -#define UNIPHIER_PINCTRL_DRV3CTRL_BASE 0x980 -#define UNIPHIER_PINCTRL_PUPDCTRL_BASE 0xa00 -#define UNIPHIER_PINCTRL_IECTRL 0xd00 - /* input enable control register bit */ #define UNIPHIER_PIN_IECTRL_SHIFT 0 #define UNIPHIER_PIN_IECTRL_BITS 8 |