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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-31 10:05:16 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-05-31 12:48:28 +0200 |
| commit | c2ebf4754b92f9fb1e422c8c068da7f0b12c9432 (patch) | |
| tree | 6d29b2b74ec031d197c651d8d1c94706e849b690 /drivers/pinctrl/uniphier/pinctrl-uniphier.h | |
| parent | pinctrl: uniphier: support pin configuration in sparse pin space (diff) | |
| download | linux-c2ebf4754b92f9fb1e422c8c068da7f0b12c9432.tar.xz linux-c2ebf4754b92f9fb1e422c8c068da7f0b12c9432.zip | |
pinctrl: uniphier: introduce capability flag
The core part of the UniPhier pinctrl driver needs to support a new
capability for upcoming UniPhier ARMv8 SoCs. This sometimes happens
because pinctrl drivers include really SoC-specific stuff.
This commit intends to tidy up SoC-specific parameters of the existing
drivers before adding the new one. Having just one flag would be
better than adding a new struct member every time a new SoC-specific
capability comes up.
At this time, there is one flag, UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE.
This capability (I'd say rather quirk) was added for PH1-Pro4 and
PH1-Pro5 as requirement from a customer. For those SoCs, one pin-mux
setting is controlled by the combination of two separate registers; the
LSB bits at register offset (8 * N) and the MSB bits at (8 * N + 4).
Because it is impossible to update two separate registers atomically,
the LOAD_PINCTRL register should be set in order to make the pin-mux
settings really effective.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index eca379a2b976..3fd50206c310 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -15,6 +15,7 @@ #ifndef __PINCTRL_UNIPHIER_H__ #define __PINCTRL_UNIPHIER_H__ +#include <linux/bitops.h> #include <linux/bug.h> #include <linux/kernel.h> #include <linux/types.h> @@ -164,9 +165,8 @@ struct uniphier_pinctrl_socdata { int groups_count; const struct uniphier_pinmux_function *functions; int functions_count; - unsigned mux_bits; - unsigned reg_stride; - bool load_pinctrl; + unsigned int caps; +#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0) }; #define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g) \ |