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authorRafał Miłecki <rafal@milecki.pl>2018-10-15 11:30:13 +0200
committerLinus Walleij <linus.walleij@linaro.org>2018-10-16 09:43:34 +0200
commit93d39737b29eaf1974bf850ccdc903b2418c800b (patch)
tree87c270916d123541eac525107c02521800325c03 /drivers/pinctrl/uniphier
parentpinctrl: geminilake: Sort register offsets by value (diff)
downloadlinux-93d39737b29eaf1974bf850ccdc903b2418c800b.tar.xz
linux-93d39737b29eaf1974bf850ccdc903b2418c800b.zip
dt-bindings: pinctrl: bcm4708-pinmux: improve example binding
Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or "Central Resource Unit") registers. There are more CRU registers and functions so CRU should be represented as a separated block in DT. Moreover CRU is a sub-block of DMU ("Device Management Unit") so that one should also get its own node. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier')
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