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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 19:24:12 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-05 12:02:28 +0200 |
commit | fc883ed5a43e5f94894216896d74190ecf1356ff (patch) | |
tree | 9aca6d878b0f9ebc6101d573af0de85fbef4c978 /drivers/pinctrl | |
parent | pinctrl: renesas: sh7786: Optimize fixed-width reserved fields (diff) | |
download | linux-fc883ed5a43e5f94894216896d74190ecf1356ff.tar.xz linux-fc883ed5a43e5f94894216896d74190ecf1356ff.zip |
pinctrl: renesas: checker: Add reserved field checks
Add checks for discovering registers with reserved fields that could
benefit from being described using variable-width reserved field
shorthands, reducing kernel size.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f5a5159ba7b396e6f09dd3f23c864a74ed8e342d.1649865241.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/renesas/core.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index ec88fe867f09..8c14b2021bf0 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -877,7 +877,7 @@ static const struct sh_pfc_pin __init *sh_pfc_find_pin( static void __init sh_pfc_check_cfg_reg(const char *drvname, const struct pinmux_cfg_reg *cfg_reg) { - unsigned int i, n, rw; + unsigned int i, n, rw, r; int fw; sh_pfc_check_reg(drvname, cfg_reg->reg, @@ -886,6 +886,15 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname, if (cfg_reg->field_width) { fw = cfg_reg->field_width; n = (cfg_reg->reg_width / fw) << fw; + for (i = 0, r = 0; i < n; i += 1 << fw) { + if (is0s(&cfg_reg->enum_ids[i], 1 << fw)) + r++; + } + + if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw) + sh_pfc_warn("reg 0x%x can be described with variable-width reserved fields\n", + cfg_reg->reg); + /* Skip field checks (done at build time) */ goto check_enum_ids; } |