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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2023-01-02 23:18:12 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2023-01-26 16:45:49 +0100
commit2d4a628cade2fe9cf7aa5629cffe768afe0e7ae1 (patch)
treeb0fbb43e1b8c5a21eaf7eec4609f4273cbec7307 /drivers/pinctrl
parentpinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts (diff)
downloadlinux-2d4a628cade2fe9cf7aa5629cffe768afe0e7ae1.tar.xz
linux-2d4a628cade2fe9cf7aa5629cffe768afe0e7ae1.zip
pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks
Add BUILD_BUG_ON() checks to avoid overflows for GPIO configs for each supported SoC. While at it, for readability set n_port_pins based on the GPIO pin configs and not on GPIO names for r9a07g044_data as done for r9a07g043_data. Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230102221815.273719-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/renesas/pinctrl-rzg2l.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 6f762097557a..04b31f0c6b34 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -1468,6 +1468,12 @@ static int rzg2l_pinctrl_probe(struct platform_device *pdev)
struct rzg2l_pinctrl *pctrl;
int ret;
+ BUILD_BUG_ON(ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT >
+ ARRAY_SIZE(rzg2l_gpio_names));
+
+ BUILD_BUG_ON(ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT >
+ ARRAY_SIZE(rzg2l_gpio_names));
+
pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
if (!pctrl)
return -ENOMEM;
@@ -1531,7 +1537,7 @@ static struct rzg2l_pinctrl_data r9a07g044_data = {
.port_pin_configs = rzg2l_gpio_configs,
.n_ports = ARRAY_SIZE(rzg2l_gpio_configs),
.dedicated_pins = rzg2l_dedicated_pins.common,
- .n_port_pins = ARRAY_SIZE(rzg2l_gpio_names),
+ .n_port_pins = ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT,
.n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common) +
ARRAY_SIZE(rzg2l_dedicated_pins.rzg2l_pins),
};