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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-12-12 14:36:54 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-12-18 11:25:56 +0100
commitb0f77269f6bba385f1f4dce44e7756cf8fbc0176 (patch)
treeba4a28b5411439efc51e94ba9632665c2839ca9d /drivers/pinctrl
parentpinctrl: sh-pfc: r8a77970: Add missing MOD_SEL0 field (diff)
downloadlinux-b0f77269f6bba385f1f4dce44e7756cf8fbc0176.tar.xz
linux-b0f77269f6bba385f1f4dce44e7756cf8fbc0176.zip
pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 field
The Module Select Register 0 contains 20 (= 5 x 4) reserved bits, and 12 single-bit fields, but the variable field descriptor lacks a field of 4 reserved bits. Fixes: f59125248a691dfe ("pinctrl: sh-pfc: Add R8A77980 PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a77980.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c
index aa1d50b398c5..8bef24502f0c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c
@@ -2821,7 +2821,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
#define F_(x, y) x,
#define FM(x) FN_##x,
{ PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
- 4, 4, 4, 4,
+ 4, 4, 4, 4, 4,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {
/* RESERVED 31, 30, 29, 28 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,