Merge tag 'tag-chrome-platform-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux

Pull chrome platform updates from Benson Leung
 "CrOS EC:
   - Add new CrOS ISHTP transport protocol
   - Add proper documentation for debugfs entries and expose resume and
     uptime files
   - Select LPC transport protocol variant at runtime.
   - Add lid angle sensor driver
   - Fix oops on suspend/resume for lightbar driver
   - Set CrOS SPI transport protol in realtime

  Wilco EC:
   - Add telemetry char device interface
   - Add support for event handling
   - Add new sysfs attributes

  Misc:
   - Contains ib-mfd-cros-v5.3 immutable branch from mfd, with
     cros_ec_commands.h header freshly synced with Chrome OS's EC
     project"

* tag 'tag-chrome-platform-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: (54 commits)
  mfd / platform: cros_ec_debugfs: Expose resume result via debugfs
  platform/chrome: lightbar: Get drvdata from parent in suspend/resume
  iio: cros_ec: Add lid angle driver
  platform/chrome: wilco_ec: Add circular buffer as event queue
  platform/chrome: cros_ec_lpc_mec: Fix kernel-doc comment first line
  platform/chrome: cros_ec_lpc: Choose Microchip EC at runtime
  platform/chrome: cros_ec_lpc: Merge cros_ec_lpc and cros_ec_lpc_reg
  Input: cros_ec_keyb: mask out extra flags in event_type
  platform/chrome: wilco_ec: Fix unreleased lock in event_read()
  platform/chrome: cros_ec_debugfs: cros_ec_uptime_fops can be static
  platform/chrome: cros_ec_debugfs: Add debugfs ABI documentation
  platform/chrome: cros_ec_debugfs: Fix kernel-doc comment first line
  platform/chrome: cros_ec_debugfs: Add debugfs entry to retrieve EC uptime
  mfd: cros_ec: Update I2S API
  mfd: cros_ec: Add Management API entry points
  mfd: cros_ec: Add SKU ID and Secure storage API
  mfd: cros_ec: Add API for rwsig
  mfd: cros_ec: Add API for Fingerprint support
  mfd: cros_ec: Add API for Touchpad support
  mfd: cros_ec: Add API for EC-EC communication
  ...

1 files changed, 22 insertions, 20 deletions

diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig
index 2826f7136f65..970679d0b6f6 100644
--- a/drivers/platform/chrome/Kconfig
+++ b/drivers/platform/chrome/Kconfig
@@ -72,6 +72,19 @@ config CROS_EC_RPMSG
 	  To compile this driver as a module, choose M here: the
 	  module will be called cros_ec_rpmsg.
 
+config CROS_EC_ISHTP
+	tristate "ChromeOS Embedded Controller (ISHTP)"
+	depends on MFD_CROS_EC
+	depends on INTEL_ISH_HID
+	help
+	  If you say Y here, you get support for talking to the ChromeOS EC
+	  firmware running on Intel Integrated Sensor Hub (ISH), using the
+	  ISH Transport protocol (ISH-TP). This uses a simple byte-level
+	  protocol with a checksum.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called cros_ec_ishtp.
+
 config CROS_EC_SPI
 	tristate "ChromeOS Embedded Controller (SPI)"
 	depends on MFD_CROS_EC && SPI
@@ -83,28 +96,17 @@ config CROS_EC_SPI
 	  'pre-amble' bytes before the response actually starts.
 
 config CROS_EC_LPC
-        tristate "ChromeOS Embedded Controller (LPC)"
-        depends on MFD_CROS_EC && ACPI && (X86 || COMPILE_TEST)
-        help
-          If you say Y here, you get support for talking to the ChromeOS EC
-          over an LPC bus. This uses a simple byte-level protocol with a
-          checksum. This is used for userspace access only. The kernel
-          typically has its own communication methods.
-
-          To compile this driver as a module, choose M here: the
-          module will be called cros_ec_lpc.
-
-config CROS_EC_LPC_MEC
-	bool "ChromeOS Embedded Controller LPC Microchip EC (MEC) variant"
-	depends on CROS_EC_LPC
-	default n
+	tristate "ChromeOS Embedded Controller (LPC)"
+	depends on MFD_CROS_EC && ACPI && (X86 || COMPILE_TEST)
 	help
-	  If you say Y here, a variant LPC protocol for the Microchip EC
-	  will be used. Note that this variant is not backward compatible
-	  with non-Microchip ECs.
+	  If you say Y here, you get support for talking to the ChromeOS EC
+	  over an LPC bus, including the LPC Microchip EC (MEC) variant.
+	  This uses a simple byte-level protocol with a checksum. This is
+	  used for userspace access only. The kernel typically has its own
+	  communication methods.
 
-	  If you have a ChromeOS Embedded Controller Microchip EC variant
-	  choose Y here.
+	  To compile this driver as a module, choose M here: the
+	  module will be called cros_ec_lpcs.
 
 config CROS_EC_PROTO
         bool