diff options
| author | Xianwei Zhao <xianwei.zhao@amlogic.com> | 2024-06-27 13:47:52 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2024-07-09 12:51:05 +0200 |
| commit | 8fbed2d7fbb5e1141ec2fbd6d4e426d9bf572e7c (patch) | |
| tree | 51380ef235771c6f2f71e127a1793b1142e54d24 /drivers/pmdomain | |
| parent | pmdomain: Merge branch dt into next (diff) | |
| download | linux-8fbed2d7fbb5e1141ec2fbd6d4e426d9bf572e7c.tar.xz linux-8fbed2d7fbb5e1141ec2fbd6d4e426d9bf572e7c.zip | |
pmdomain: amlogic: Add support for A5 power domains controller
Add support for the A5 power controller, whose registers are
in the secure domain and should be accessed via SMC.
Signed-off-by: Hongyu Chen <hongyu.chen1@amlogic.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240627-a5_secpower-v1-2-1f47dde1270c@amlogic.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/pmdomain')
| -rw-r--r-- | drivers/pmdomain/amlogic/meson-secure-pwrc.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/pmdomain/amlogic/meson-secure-pwrc.c b/drivers/pmdomain/amlogic/meson-secure-pwrc.c index df5567418226..f6729eea6b8c 100644 --- a/drivers/pmdomain/amlogic/meson-secure-pwrc.c +++ b/drivers/pmdomain/amlogic/meson-secure-pwrc.c @@ -15,6 +15,7 @@ #include <dt-bindings/power/meson-s4-power.h> #include <dt-bindings/power/amlogic,t7-pwrc.h> #include <dt-bindings/power/amlogic,a4-pwrc.h> +#include <dt-bindings/power/amlogic,a5-pwrc.h> #include <linux/arm-smccc.h> #include <linux/firmware/meson/meson_sm.h> #include <linux/module.h> @@ -155,6 +156,22 @@ static struct meson_secure_pwrc_domain_desc a4_pwrc_domains[] = { SEC_PD(A4_AO_IR, GENPD_FLAG_ALWAYS_ON), }; +static struct meson_secure_pwrc_domain_desc a5_pwrc_domains[] = { + SEC_PD(A5_NNA, 0), + SEC_PD(A5_AUDIO, 0), + SEC_PD(A5_SDIOA, 0), + SEC_PD(A5_EMMC, 0), + SEC_PD(A5_USB_COMB, 0), + SEC_PD(A5_ETH, 0), + SEC_PD(A5_RSA, 0), + SEC_PD(A5_AUDIO_PDM, 0), + /* DMC is for DDR PHY ana/dig and DMC, and should be always on */ + SEC_PD(A5_DMC, GENPD_FLAG_ALWAYS_ON), + /* WRAP is secure_top, a lot of modules are included, and should be always on */ + SEC_PD(A5_SYS_WRAP, GENPD_FLAG_ALWAYS_ON), + SEC_PD(A5_DSPA, 0), +}; + static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = { SEC_PD(C3_NNA, 0), SEC_PD(C3_AUDIO, 0), @@ -335,6 +352,11 @@ static struct meson_secure_pwrc_domain_data amlogic_secure_a4_pwrc_data = { .count = ARRAY_SIZE(a4_pwrc_domains), }; +static struct meson_secure_pwrc_domain_data amlogic_secure_a5_pwrc_data = { + .domains = a5_pwrc_domains, + .count = ARRAY_SIZE(a5_pwrc_domains), +}; + static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = { .domains = c3_pwrc_domains, .count = ARRAY_SIZE(c3_pwrc_domains), @@ -360,6 +382,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = { .data = &amlogic_secure_a4_pwrc_data, }, { + .compatible = "amlogic,a5-pwrc", + .data = &amlogic_secure_a5_pwrc_data, + }, + { .compatible = "amlogic,c3-pwrc", .data = &amlogic_secure_c3_pwrc_data, }, |