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author | Andre Przywara <andre.przywara@arm.com> | 2016-11-01 19:00:08 +0100 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2016-11-04 18:56:54 +0100 |
commit | 112b0b8f8f6e18d4695d21457961c0e1b322a1d7 (patch) | |
tree | 0145a35a2e65e9cbc713ec2d56dd04c3b9ea6216 /drivers/powercap | |
parent | arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a s... (diff) | |
download | linux-112b0b8f8f6e18d4695d21457961c0e1b322a1d7.tar.xz linux-112b0b8f8f6e18d4695d21457961c0e1b322a1d7.zip |
KVM: arm/arm64: vgic: Prevent access to invalid SPIs
In our VGIC implementation we limit the number of SPIs to a number
that the userland application told us. Accordingly we limit the
allocation of memory for virtual IRQs to that number.
However in our MMIO dispatcher we didn't check if we ever access an
IRQ beyond that limit, leading to out-of-bound accesses.
Add a test against the number of allocated SPIs in check_region().
Adjust the VGIC_ADDR_TO_INT macro to avoid an actual division, which
is not implemented on ARM(32).
[maz: cleaned-up original patch]
Cc: stable@vger.kernel.org
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/powercap')
0 files changed, 0 insertions, 0 deletions