diff options
| author | Dan O'Donovan <dan@emutex.com> | 2016-06-01 16:31:12 +0200 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2016-07-11 12:07:23 +0200 |
| commit | e5ca42458b6278b7d5866e08dae7c45349af2157 (patch) | |
| tree | d9fe091c919e771fb56f11647c8b8bc743a2f4bf /drivers/pwm/pwm-lpss.c | |
| parent | pwm: pwm-ti*: Remove support for local clock gating (diff) | |
| download | linux-e5ca42458b6278b7d5866e08dae7c45349af2157.tar.xz linux-e5ca42458b6278b7d5866e08dae7c45349af2157.zip | |
pwm: lpss: Fix base_unit calculation for PWM frequency
The base_unit calculation applies an offset of 0x2 which adds
significant error for lower frequencies and doesn't appear to be
warranted - rounding the division result gives a correct value.
Also, the upper limit check for base_unit is off-by-one; the upper
nibble of base_unit is invalid if >=128 according to the Table 88
in the Z8000 Processor Series Datasheet Volume 1 (Rev. 2).
Verified on UP Board (Cherry Trail) and Minnowboard Max (Bay Trail).
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-lpss.c')
| -rw-r--r-- | drivers/pwm/pwm-lpss.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c index 295b963dbddb..98dc8b80b79d 100644 --- a/drivers/pwm/pwm-lpss.c +++ b/drivers/pwm/pwm-lpss.c @@ -27,7 +27,6 @@ #define PWM_SW_UPDATE BIT(30) #define PWM_BASE_UNIT_SHIFT 8 #define PWM_ON_TIME_DIV_MASK 0x000000ff -#define PWM_DIVISION_CORRECTION 0x2 /* Size of each PWM register space if multiple */ #define PWM_SIZE 0x400 @@ -101,17 +100,16 @@ static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm, /* * The equation is: - * base_unit = ((freq / c) * base_unit_range) + correction + * base_unit = round(base_unit_range * freq / c) */ base_unit_range = BIT(lpwm->info->base_unit_bits); - base_unit = freq * base_unit_range; + freq *= base_unit_range; c = lpwm->info->clk_rate; if (!c) return -EINVAL; - do_div(base_unit, c); - base_unit += PWM_DIVISION_CORRECTION; + base_unit = DIV_ROUND_CLOSEST_ULL(freq, c); if (duty_ns <= 0) duty_ns = 1; |