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authorGerald Baeza <gerald.baeza@st.com>2018-02-23 14:36:04 +0100
committerThierry Reding <thierry.reding@gmail.com>2018-03-28 00:54:56 +0200
commitf6ea025f6ea1fb1455e59e2008d88f5c72f0d210 (patch)
treef1b6ec57f9e7111272ce3fa0e49c81ec526cd276 /drivers/pwm
parentdt-bindings: pwm-stm32-lp: Add #pwm-cells (diff)
downloadlinux-f6ea025f6ea1fb1455e59e2008d88f5c72f0d210.tar.xz
linux-f6ea025f6ea1fb1455e59e2008d88f5c72f0d210.zip
pwm: stm32: LPTimer: Use 3 cells ->of_xlate()
STM32 Low-Power Timer supports generic 3 cells PWM to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/pwm-stm32-lp.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index cbd271e80c3c..7c13e2505080 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -202,6 +202,8 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev)
priv->chip.dev = &pdev->dev;
priv->chip.ops = &stm32_pwm_lp_ops;
priv->chip.npwm = 1;
+ priv->chip.of_xlate = of_pwm_xlate_with_flags;
+ priv->chip.of_pwm_n_cells = 3;
ret = pwmchip_add(&priv->chip);
if (ret < 0)