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authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>2023-04-06 21:41:55 +0200
committerMark Brown <broonie@kernel.org>2023-04-11 14:24:54 +0200
commitd25016618c0845b2a0f9ae64d084a66efd39b03c (patch)
treefd6f26fe66670a3e71c1322cc2824cb44e0dd683 /drivers/regulator
parentregulator: fan53555: Remove unused *_SLEW_SHIFT definitions (diff)
downloadlinux-d25016618c0845b2a0f9ae64d084a66efd39b03c.tar.xz
linux-d25016618c0845b2a0f9ae64d084a66efd39b03c.zip
regulator: fan53555: Make use of the bit macros
For consistency and improved clarity, use BIT() and GENMASK() macros for defining the bitfields inside the registers. No functional changes intended. While here, also fix DIE_{ID,REV} inconsistent indentation. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230406194158.963352-6-cristian.ciocaltea@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/regulator')
-rw-r--r--drivers/regulator/fan53555.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c
index cdab382ce4b8..16a0f11601f8 100644
--- a/drivers/regulator/fan53555.c
+++ b/drivers/regulator/fan53555.c
@@ -41,23 +41,23 @@
#define FAN53555_MONITOR 0x05
/* VSEL bit definitions */
-#define VSEL_BUCK_EN (1 << 7)
-#define VSEL_MODE (1 << 6)
+#define VSEL_BUCK_EN BIT(7)
+#define VSEL_MODE BIT(6)
/* Chip ID and Verison */
-#define DIE_ID 0x0F /* ID1 */
-#define DIE_REV 0x0F /* ID2 */
+#define DIE_ID 0x0F /* ID1 */
+#define DIE_REV 0x0F /* ID2 */
/* Control bit definitions */
-#define CTL_OUTPUT_DISCHG (1 << 7)
-#define CTL_SLEW_MASK (0x7 << 4)
-#define CTL_RESET (1 << 2)
+#define CTL_OUTPUT_DISCHG BIT(7)
+#define CTL_SLEW_MASK GENMASK(6, 4)
+#define CTL_RESET BIT(2)
#define CTL_MODE_VSEL0_MODE BIT(0)
#define CTL_MODE_VSEL1_MODE BIT(1)
#define FAN53555_NVOLTAGES 64 /* Numbers of voltages */
#define FAN53526_NVOLTAGES 128
-#define TCS_VSEL0_MODE (1 << 7)
-#define TCS_VSEL1_MODE (1 << 6)
+#define TCS_VSEL0_MODE BIT(7)
+#define TCS_VSEL1_MODE BIT(6)
#define TCS_SLEW_MASK GENMASK(4, 3)