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author | Michael Walle <michael@walle.cc> | 2022-08-26 13:56:05 +0200 |
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committer | Philipp Zabel <p.zabel@pengutronix.de> | 2022-08-30 16:29:41 +0200 |
commit | 51fd191422d987dfd75a711aae592069ebb03ec9 (patch) | |
tree | aa7432480ef944ee5e9a281f0002cd6ed022fc34 /drivers/reset/reset-qcom-pdc.c | |
parent | reset: imx7: Fix the iMX8MP PCIe PHY PERST support (diff) | |
download | linux-51fd191422d987dfd75a711aae592069ebb03ec9.tar.xz linux-51fd191422d987dfd75a711aae592069ebb03ec9.zip |
reset: microchip-sparx5: issue a reset on startup
Originally this was used in by the switch core driver to issue a reset.
But it turns out, this isn't just a switch core reset but instead it
will reset almost the complete SoC.
Instead of adding almost all devices of the SoC a shared reset line,
issue the reset once early on startup. Keep the reset controller for
backwards compatibility, but make the actual reset a noop.
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Steen Hegelund <Steen.Hegelund@microchip.com> on Sparx5
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20220826115607.1148489-2-michael@walle.cc
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