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| author | Sean Wang <sean.wang@mediatek.com> | 2017-09-20 11:40:16 +0200 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2017-10-04 12:13:29 +0200 |
| commit | 7f4fbf79f4d4c00466e1b4158b17c5a095c83f2c (patch) | |
| tree | 438731c5e6f23619a1da2ce7a0d07ed300a6b0a4 /drivers/reset | |
| parent | reset: socfpga: build the reset-socfpga for Stratix10 SOC (diff) | |
| download | linux-7f4fbf79f4d4c00466e1b4158b17c5a095c83f2c.tar.xz linux-7f4fbf79f4d4c00466e1b4158b17c5a095c83f2c.zip | |
reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC
Add the reset controller dt-bindings exported from infracfg, pericfg,
hifsys and ethsys which could be found on MT7622 SoC. So that we can
reference them from within a device-tree file.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/reset')
0 files changed, 0 insertions, 0 deletions