diff options
| author | Oliver.Rohe@wago.com <Oliver.Rohe@wago.com> | 2019-01-09 11:59:40 +0100 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2019-02-05 23:11:31 +0100 |
| commit | 761acdda5c2cc89208a94941f69579923420c8e9 (patch) | |
| tree | 6a5e0ccc1b5eedd1a3ddddefed74f08c29081c71 /drivers/rtc/rtc-rs5c372.c | |
| parent | rtc: snvs: make sure clock is enabled for interrupt handle (diff) | |
| download | linux-761acdda5c2cc89208a94941f69579923420c8e9.tar.xz linux-761acdda5c2cc89208a94941f69579923420c8e9.zip | |
rtc: rs5c372: r2221: fix to use the correct XSTP bit
The Ricoh chips have slightly different register layouts
and the r2221 chip uses bit 5 as the oscillator halt sensor bit.
Signed-off-by: Olive Rohe <oliver.rohe@wago.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/rtc/rtc-rs5c372.c')
| -rw-r--r-- | drivers/rtc/rtc-rs5c372.c | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/drivers/rtc/rtc-rs5c372.c b/drivers/rtc/rtc-rs5c372.c index c5038329058c..ff35dcef338b 100644 --- a/drivers/rtc/rtc-rs5c372.c +++ b/drivers/rtc/rtc-rs5c372.c @@ -52,8 +52,8 @@ # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ #define RS5C_REG_CTRL2 15 # define RS5C372_CTRL2_24 (1 << 5) -# define R2025_CTRL2_XST (1 << 5) -# define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ +# define R2x2x_CTRL2_XSTP (1 << 5) /* only if R2x2x */ +# define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2x2x */ # define RS5C_CTRL2_CTFG (1 << 2) # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ @@ -519,20 +519,30 @@ static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) unsigned char buf[2]; int addr, i, ret = 0; - if (rs5c372->type == rtc_r2025sd) { - if (rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST) + addr = RS5C_ADDR(RS5C_REG_CTRL1); + buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; + buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; + + /* handle xstp bit */ + switch (rs5c372->type) { + case rtc_r2025sd: + if (buf[1] & R2x2x_CTRL2_XSTP) return ret; - rs5c372->regs[RS5C_REG_CTRL2] |= R2025_CTRL2_XST; - } else { - if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) + rs5c372->regs[RS5C_REG_CTRL2] |= R2x2x_CTRL2_XSTP; + break; + case rtc_r2221tl: + if (!(buf[1] & R2x2x_CTRL2_XSTP)) + return ret; + rs5c372->regs[RS5C_REG_CTRL2] &= ~R2x2x_CTRL2_XSTP; + break; + + default: + if (!(buf[1] & RS5C_CTRL2_XSTP)) return ret; rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; + break; } - addr = RS5C_ADDR(RS5C_REG_CTRL1); - buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; - buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; - /* use 24hr mode */ switch (rs5c372->type) { case rtc_rs5c372a: |