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authorDan Williams <dan.j.williams@intel.com>2022-12-06 05:28:40 +0100
committerDan Williams <dan.j.williams@intel.com>2022-12-06 23:38:12 +0100
commit9b5f77efb0dc71d95403b528756e39b6cae0b948 (patch)
treef639b4dbbddba7fbc8f5a82e1edd05314745fd1f /drivers/s390/block/dasd_eer.c
parentcxl/pci: Add some type-safety to the AER trace points (diff)
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cxl/pci: Remove endian confusion
readl() already handles endian conversion. That's the main difference between readl() and __raw_readl(). This is benign on little-endian systems, but big endian systems will end up byte-swabbing twice. Fixes: 2905cb5236cb ("cxl/pci: Add (hopeful) error handling support") Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/167030092025.4045167.10651070153523351093.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/s390/block/dasd_eer.c')
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