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author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-09-28 16:56:43 +0200 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2006-09-28 16:56:43 +0200 |
commit | 94c12cc7d196bab34aaa98d38521549fa1e5ef76 (patch) | |
tree | 8e0cec0ed44445d74a2cb5160303d6b4dfb1bc31 /drivers/s390/cio/ioasm.h | |
parent | [S390] Whitespace cleanup. (diff) | |
download | linux-94c12cc7d196bab34aaa98d38521549fa1e5ef76.tar.xz linux-94c12cc7d196bab34aaa98d38521549fa1e5ef76.zip |
[S390] Inline assembly cleanup.
Major cleanup of all s390 inline assemblies. They now have a common
coding style. Quite a few have been shortened, mainly by using register
asm variables. Use of the EX_TABLE macro helps as well. The atomic ops,
bit ops and locking inlines new use the Q-constraint if a newer gcc
is used. That results in slightly better code.
Thanks to Christian Borntraeger for proof reading the changes.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'drivers/s390/cio/ioasm.h')
-rw-r--r-- | drivers/s390/cio/ioasm.h | 220 |
1 files changed, 81 insertions, 139 deletions
diff --git a/drivers/s390/cio/ioasm.h b/drivers/s390/cio/ioasm.h index 95a9462f9a91..ad6d82940069 100644 --- a/drivers/s390/cio/ioasm.h +++ b/drivers/s390/cio/ioasm.h @@ -25,106 +25,74 @@ struct tpi_info { static inline int stsch(struct subchannel_id schid, volatile struct schib *addr) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " stsch 0(%2)\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid), "a" (addr), "m" (*addr) - : "cc", "1" ); + asm volatile( + " stsch 0(%2)\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); return ccode; } static inline int stsch_err(struct subchannel_id schid, volatile struct schib *addr) { - int ccode; + register struct subchannel_id reg1 asm ("1") = schid; + int ccode = -EIO; - __asm__ __volatile__( - " lhi %0,%3\n" - " lr 1,%1\n" - " stsch 0(%2)\n" - "0: ipm %0\n" - " srl %0,28\n" + asm volatile( + " stsch 0(%2)\n" + "0: ipm %0\n" + " srl %0,28\n" "1:\n" -#ifdef CONFIG_64BIT - ".section __ex_table,\"a\"\n" - " .align 8\n" - " .quad 0b,1b\n" - ".previous" -#else - ".section __ex_table,\"a\"\n" - " .align 4\n" - " .long 0b,1b\n" - ".previous" -#endif - : "=&d" (ccode) - : "d" (schid), "a" (addr), "K" (-EIO), "m" (*addr) - : "cc", "1" ); + EX_TABLE(0b,1b) + : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); return ccode; } static inline int msch(struct subchannel_id schid, volatile struct schib *addr) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " msch 0(%2)\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid), "a" (addr), "m" (*addr) - : "cc", "1" ); + asm volatile( + " msch 0(%2)\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); return ccode; } static inline int msch_err(struct subchannel_id schid, volatile struct schib *addr) { - int ccode; + register struct subchannel_id reg1 asm ("1") = schid; + int ccode = -EIO; - __asm__ __volatile__( - " lhi %0,%3\n" - " lr 1,%1\n" - " msch 0(%2)\n" - "0: ipm %0\n" - " srl %0,28\n" + asm volatile( + " msch 0(%2)\n" + "0: ipm %0\n" + " srl %0,28\n" "1:\n" -#ifdef CONFIG_64BIT - ".section __ex_table,\"a\"\n" - " .align 8\n" - " .quad 0b,1b\n" - ".previous" -#else - ".section __ex_table,\"a\"\n" - " .align 4\n" - " .long 0b,1b\n" - ".previous" -#endif - : "=&d" (ccode) - : "d" (schid), "a" (addr), "K" (-EIO), "m" (*addr) - : "cc", "1" ); + EX_TABLE(0b,1b) + : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); return ccode; } static inline int tsch(struct subchannel_id schid, volatile struct irb *addr) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " tsch 0(%2)\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid), "a" (addr), "m" (*addr) - : "cc", "1" ); + asm volatile( + " tsch 0(%2)\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); return ccode; } @@ -132,89 +100,77 @@ static inline int tpi( volatile struct tpi_info *addr) { int ccode; - __asm__ __volatile__( - " tpi 0(%1)\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "a" (addr), "m" (*addr) - : "cc", "1" ); + asm volatile( + " tpi 0(%1)\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "a" (addr), "m" (*addr) : "cc"); return ccode; } static inline int ssch(struct subchannel_id schid, volatile struct orb *addr) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " ssch 0(%2)\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid), "a" (addr), "m" (*addr) - : "cc", "1" ); + asm volatile( + " ssch 0(%2)\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); return ccode; } static inline int rsch(struct subchannel_id schid) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " rsch\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid) - : "cc", "1" ); + asm volatile( + " rsch\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1) : "cc"); return ccode; } static inline int csch(struct subchannel_id schid) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " csch\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid) - : "cc", "1" ); + asm volatile( + " csch\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1) : "cc"); return ccode; } static inline int hsch(struct subchannel_id schid) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " hsch\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid) - : "cc", "1" ); + asm volatile( + " hsch\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1) : "cc"); return ccode; } static inline int xsch(struct subchannel_id schid) { + register struct subchannel_id reg1 asm ("1") = schid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " .insn rre,0xb2760000,%1,0\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (schid) - : "cc", "1" ); + asm volatile( + " .insn rre,0xb2760000,%1,0\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1) : "cc"); return ccode; } @@ -223,41 +179,27 @@ static inline int chsc(void *chsc_area) typedef struct { char _[4096]; } addr_type; int cc; - __asm__ __volatile__ ( - ".insn rre,0xb25f0000,%2,0 \n\t" - "ipm %0 \n\t" - "srl %0,28 \n\t" + asm volatile( + " .insn rre,0xb25f0000,%2,0\n" + " ipm %0\n" + " srl %0,28\n" : "=d" (cc), "=m" (*(addr_type *) chsc_area) : "d" (chsc_area), "m" (*(addr_type *) chsc_area) - : "cc" ); - + : "cc"); return cc; } -static inline int iac( void) -{ - int ccode; - - __asm__ __volatile__( - " iac 1\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) : : "cc", "1" ); - return ccode; -} - static inline int rchp(int chpid) { + register unsigned int reg1 asm ("1") = chpid; int ccode; - __asm__ __volatile__( - " lr 1,%1\n" - " rchp\n" - " ipm %0\n" - " srl %0,28" - : "=d" (ccode) - : "d" (chpid) - : "cc", "1" ); + asm volatile( + " lr 1,%1\n" + " rchp\n" + " ipm %0\n" + " srl %0,28" + : "=d" (ccode) : "d" (reg1) : "cc"); return ccode; } |