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authorFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>2010-08-11 03:03:24 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-11 17:59:21 +0200
commitd80e0d96a328cc864a1cb359f545a6ed0c61812d (patch)
tree805689907e865c14943b7b77b7b1d64ca8044e01 /drivers/scsi/53c700.c
parentdma-mapping: parisc: set ARCH_DMA_MINALIGN (diff)
downloadlinux-d80e0d96a328cc864a1cb359f545a6ed0c61812d.tar.xz
linux-d80e0d96a328cc864a1cb359f545a6ed0c61812d.zip
scsi: 53c700: remove dma_is_consistent usage
This driver is the only user of dma_is_consistent(). We plan to remove this API. The driver uses the API in the following way: BUG_ON(!dma_is_consistent(hostdata->dev, pScript) && L1_CACHE_BYTES < dma_get_cache_alignment()); The above code tries to see if L1_CACHE_BYTES is greater than dma_get_cache_alignment() on sysmtes that can not allocate coherent memory (some old systems can't). James Bottomley exmplained that this is necesary because the driver packs the set of mailboxes into a single coherent area and separates the different usages by a L1 cache stride. So it's fatal if the dma He also pointed out that we can kill this checking because we don't hit this BUG_ON on all architectures that actually use the driver. (akpm: stolen from the scsi tree because dma-mapping-remove-dma_is_consistent-api.patch needs it) Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: James Bottomley <James.Bottomley@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/scsi/53c700.c')
-rw-r--r--drivers/scsi/53c700.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/scsi/53c700.c b/drivers/scsi/53c700.c
index 80dc3ac12cde..89fc1c8af86b 100644
--- a/drivers/scsi/53c700.c
+++ b/drivers/scsi/53c700.c
@@ -309,9 +309,6 @@ NCR_700_detect(struct scsi_host_template *tpnt,
hostdata->msgin = memory + MSGIN_OFFSET;
hostdata->msgout = memory + MSGOUT_OFFSET;
hostdata->status = memory + STATUS_OFFSET;
- /* all of these offsets are L1_CACHE_BYTES separated. It is fatal
- * if this isn't sufficient separation to avoid dma flushing issues */
- BUG_ON(!dma_is_consistent(hostdata->dev, pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
hostdata->slots = (struct NCR_700_command_slot *)(memory + SLOTS_OFFSET);
hostdata->dev = dev;