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authorKars de Jong <jongk@linux-m68k.org>2007-06-17 14:47:05 +0200
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-06-17 23:15:56 +0200
commit632731345bfb87fd1f4dc509928cc4a7efc12a89 (patch)
treeaa656433bc8bd5b48581d15b3e7614bdcafc8ff0 /drivers/scsi/53c700.h
parent[SCSI] mpt fusion: fix for mounted raid volume filesytem that goes read-only (diff)
downloadlinux-632731345bfb87fd1f4dc509928cc4a7efc12a89.tar.xz
linux-632731345bfb87fd1f4dc509928cc4a7efc12a89.zip
[SCSI] 53c700: m68k support for the 53c700 SCSI core
Add m68k support to the 53c700 SCSI driver Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/53c700.h')
-rw-r--r--drivers/scsi/53c700.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/scsi/53c700.h b/drivers/scsi/53c700.h
index 841e1bb27d57..e06bdfeab420 100644
--- a/drivers/scsi/53c700.h
+++ b/drivers/scsi/53c700.h
@@ -177,6 +177,7 @@ struct NCR_700_command_slot {
__u8 state;
#define NCR_700_FLAG_AUTOSENSE 0x01
__u8 flags;
+ __u8 pad1[2]; /* Needed for m68k where min alignment is 2 bytes */
int tag;
__u32 resume_offset;
struct scsi_cmnd *cmnd;
@@ -196,6 +197,8 @@ struct NCR_700_Host_Parameters {
void __iomem *base; /* the base for the port (copied to host) */
struct device *dev;
__u32 dmode_extra; /* adjustable bus settings */
+ __u32 dcntl_extra; /* adjustable bus settings */
+ __u32 ctest7_extra; /* adjustable bus settings */
__u32 differential:1; /* if we are differential */
#ifdef CONFIG_53C700_LE_ON_BE
/* This option is for HP only. Set it if your chip is wired for
@@ -352,6 +355,7 @@ struct NCR_700_Host_Parameters {
#define SEL_TIMEOUT_DISABLE 0x10 /* 710 only */
#define DFP 0x08
#define EVP 0x04
+#define CTEST7_TT1 0x02
#define DIFF 0x01
#define CTEST6_REG 0x1A
#define TEMP_REG 0x1C
@@ -385,6 +389,7 @@ struct NCR_700_Host_Parameters {
#define SOFTWARE_RESET 0x01
#define COMPAT_700_MODE 0x01
#define SCRPTS_16BITS 0x20
+#define EA_710 0x20
#define ASYNC_DIV_2_0 0x00
#define ASYNC_DIV_1_5 0x40
#define ASYNC_DIV_1_0 0x80