diff options
| author | Suganath Prabu <suganath-prabu.subramani@broadcom.com> | 2020-04-23 09:23:13 +0200 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2020-04-24 19:08:16 +0200 |
| commit | 550dc875cfbc0b1847096f07d0964ce569e41579 (patch) | |
| tree | 243800adbd9561967a070b120dac36ab4d2f1626 /drivers/scsi/mpt3sas | |
| parent | scsi: mpt3sas: Don't change the DMA coherent mask after allocations (diff) | |
| download | linux-550dc875cfbc0b1847096f07d0964ce569e41579.tar.xz linux-550dc875cfbc0b1847096f07d0964ce569e41579.zip | |
scsi: mpt3sas: Rename function name is_MSB_are_same
Rename is_MSB_are_same() to mpt3sas_check_same_4gb_region() for better
readability.
Link: https://lore.kernel.org/r/1587626596-1044-3-git-send-email-suganath-prabu.subramani@broadcom.com
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Suganath Prabu <suganath-prabu.subramani@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/mpt3sas')
| -rw-r--r-- | drivers/scsi/mpt3sas/mpt3sas_base.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 58d607b422d2..f0eace3517f4 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -4915,7 +4915,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc) } /** - * is_MSB_are_same - checks whether all reply queues in a set are + * mpt3sas_check_same_4gb_region - checks whether all reply queues in a set are * having same upper 32bits in their base memory address. * @reply_pool_start_address: Base address of a reply queue set * @pool_sz: Size of single Reply Descriptor Post Queues pool size @@ -4925,7 +4925,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc) */ static int -is_MSB_are_same(long reply_pool_start_address, u32 pool_sz) +mpt3sas_check_same_4gb_region(long reply_pool_start_address, u32 pool_sz) { long reply_pool_end_address; @@ -5377,7 +5377,7 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc) * Actual requirement is not alignment, but we need start and end of * DMA address must have same upper 32 bit address. */ - if (!is_MSB_are_same((long)ioc->sense, sz)) { + if (!mpt3sas_check_same_4gb_region((long)ioc->sense, sz)) { //Release Sense pool & Reallocate dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); dma_pool_destroy(ioc->sense_dma_pool); |