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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-03-29 10:56:56 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-04-16 13:42:18 +0200 |
| commit | a34f778cb89a8554a5d1f5a75b297c07c672afce (patch) | |
| tree | 7eb35c1770f7e5ce4c99aff916d4b4bc0b86ea09 /drivers/scsi/qedf | |
| parent | clk: renesas: r8a77980: Correct parent clock of PCIEC0 (diff) | |
| download | linux-a34f778cb89a8554a5d1f5a75b297c07c672afce.tar.xz linux-a34f778cb89a8554a5d1f5a75b297c07c672afce.zip | |
clk: renesas: rcar-gen2: Centralize quirks handling
Introduce centralized quirks handling like on R-Car Gen3, and convert
the RZ/G1C SD clock table handling over to it.
This makes it easier to add more quirks later, if/when needed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Diffstat (limited to 'drivers/scsi/qedf')
0 files changed, 0 insertions, 0 deletions