summaryrefslogtreecommitdiffstats
path: root/drivers/scsi
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2018-03-20 03:50:05 +0100
committerMartin K. Petersen <martin.petersen@oracle.com>2018-06-19 03:02:52 +0200
commitf2233a33dc1fef4aa30dc11e4c676637bf358c3d (patch)
treeea1db52ba3623f7243ece01e55a971e4e96602cf /drivers/scsi
parentscsi: target: tcmu: add read length support (diff)
downloadlinux-f2233a33dc1fef4aa30dc11e4c676637bf358c3d.tar.xz
linux-f2233a33dc1fef4aa30dc11e4c676637bf358c3d.zip
scsi: ipr: Eliminate duplicate barriers
Driver does both wmb() and writel(). The latter already has a barrier on some architectures like arm64. This ends up with CPU observing two barriers back to back before executing the register write. Drivers should generally assume that the barrier implied by writel() is sufficient for ordering DMA. Remove the extraneous wmb() before it. [mkp: Squashed Arnd's and Sinan's patches] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/ipr.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 0a9b8b387bd2..02d65dce74e5 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -760,7 +760,6 @@ static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
ioa_cfg->hrrq[i].allow_interrupts = 0;
spin_unlock(&ioa_cfg->hrrq[i]._lock);
}
- wmb();
/* Set interrupt mask to stop all new interrupts */
if (ioa_cfg->sis64)
@@ -8403,7 +8402,6 @@ static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
ioa_cfg->hrrq[i].allow_interrupts = 1;
spin_unlock(&ioa_cfg->hrrq[i]._lock);
}
- wmb();
if (ioa_cfg->sis64) {
/* Set the adapter to the correct endian mode. */
writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);