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| author | Paul Mundt <lethal@linux-sh.org> | 2006-12-11 12:28:03 +0100 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2006-12-12 00:42:09 +0100 |
| commit | 41504c39726a7099e5a42508dd57fe561c8b4129 (patch) | |
| tree | 29e3ea77a973fc7ee137e78a03b2b6c24b99d559 /drivers/serial | |
| parent | sh: Fixup dma_cache_sync() callers. (diff) | |
| download | linux-41504c39726a7099e5a42508dd57fe561c8b4129.tar.xz linux-41504c39726a7099e5a42508dd57fe561c8b4129.zip | |
sh: SH-MobileR SH7722 CPU support.
This adds CPU support for the SH7722.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/sh-sci.c | 22 | ||||
| -rw-r--r-- | drivers/serial/sh-sci.h | 14 |
2 files changed, 36 insertions, 0 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 9031b57f12dd..c53b69610a51 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -319,6 +319,28 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) sci_out(port, SCFCR, fcr_val); } +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) +{ + unsigned int fcr_val = 0; + + if (cflag & CRTSCTS) { + fcr_val |= SCFCR_MCE; + + ctrl_outw(0x0000, PORT_PSCR); + } else { + unsigned short data; + + data = ctrl_inw(PORT_PSCR); + data &= 0x033f; + data |= 0x0400; + ctrl_outw(data, PORT_PSCR); + + ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); + } + + sci_out(port, SCFCR, fcr_val); +} #else /* For SH7750 */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index d84c1f9f8a39..77f7d6351ab1 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -90,6 +90,13 @@ # define SCSPTR3 0xffe30010 /* 16 bit SCIF */ # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ # define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ +# define SCSPTR0 SCPDR0 +# define SCIF_ORER 0x0001 /* overrun error bit */ +# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY +# define PORT_PSCR 0xA405011E #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ @@ -522,6 +529,13 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ return 1; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xffe00000) + return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) static inline int sci_rxd_in(struct uart_port *port) { |