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authorJulien CHAUVEAU <julien.chauveau@neo-technologies.fr>2014-11-21 10:27:41 +0100
committerHeiko Stuebner <heiko@sntech.de>2014-11-23 00:39:57 +0100
commitb7bdb7f45e7b848dc2eb50c2d5c5106af68562c4 (patch)
treea6fb82b4e251e429e8c193a2b5c95515c015dfc2 /drivers/sh/pm_runtime.c
parentclk: rockchip: fix parent clock for rk3188 hclk_lcdc1 (diff)
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clk: rockchip: fix clock gate for rk3188 spdif_pre
In rk3188 clock branches, spdif_pre gate was set to RK2928_CLKGATE_CON(13) bit 13. This appears to be a copy-paste error because such a register does not exist. We correct it to RK2928_CLKGATE_CON(0) and find out that the rk3188 spdif clock is the same as the rk3066 spdif clock, so we move it to the common clock branches. Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/sh/pm_runtime.c')
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