diff options
| author | Nancy.Lin <nancy.lin@mediatek.com> | 2023-01-13 11:44:32 +0100 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-01-25 16:05:15 +0100 |
| commit | 7f0a38f46b67ba15c0fb5fc6c075a74ae9bb385d (patch) | |
| tree | fb4c977e5bc746ce1eebe47c0e74e420bc543cc8 /drivers/soc/mediatek | |
| parent | soc: mediatek: mmsys: add mmsys for support 64 reset bits (diff) | |
| download | linux-7f0a38f46b67ba15c0fb5fc6c075a74ae9bb385d.tar.xz linux-7f0a38f46b67ba15c0fb5fc6c075a74ae9bb385d.zip | |
soc: mediatek: mmsys: add reset control for MT8195 vdosys1
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Add the number of reset bits and reset base in mmsys
private data.
Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230113104434.28023-10-nancy.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'drivers/soc/mediatek')
| -rw-r--r-- | drivers/soc/mediatek/mt8195-mmsys.h | 1 | ||||
| -rw-r--r-- | drivers/soc/mediatek/mtk-mmsys.c | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h index 454944a9409c..a6652ae63431 100644 --- a/drivers/soc/mediatek/mt8195-mmsys.h +++ b/drivers/soc/mediatek/mt8195-mmsys.h @@ -75,6 +75,7 @@ #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 (2 << 16) #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE (3 << 16) +#define MT8195_VDO1_SW0_RST_B 0x1d0 #define MT8195_VDO1_MERGE0_ASYNC_CFG_WD 0xe30 #define MT8195_VDO1_HDRBE_ASYNC_CFG_WD 0xe70 #define MT8195_VDO1_HDR_TOP_CFG 0xd00 diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 32b17c56c44a..297c810440f4 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -98,6 +98,8 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = { .clk_driver = "clk-mt8195-vdo1", .routes = mmsys_mt8195_vdo1_routing_table, .num_routes = ARRAY_SIZE(mmsys_mt8195_vdo1_routing_table), + .sw0_rst_offset = MT8195_VDO1_SW0_RST_B, + .num_resets = 64, }; static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { |