summaryrefslogtreecommitdiffstats
path: root/drivers/soc/sifive/Makefile
diff options
context:
space:
mode:
authorChristoph Hellwig <hch@lst.de>2019-11-07 10:20:39 +0100
committerPaul Walmsley <paul.walmsley@sifive.com>2019-12-20 12:40:24 +0100
commit9209fb51896fe0eef8dfac85afe1f357e9265c0d (patch)
treed169219e01f1c6d347937657ff7404a141531cca /drivers/soc/sifive/Makefile
parentriscv: define vmemmap before pfn_to_page calls (diff)
downloadlinux-9209fb51896fe0eef8dfac85afe1f357e9265c0d.tar.xz
linux-9209fb51896fe0eef8dfac85afe1f357e9265c0d.zip
riscv: move sifive_l2_cache.c to drivers/soc
The sifive_l2_cache.c is in no way related to RISC-V architecture memory management. It is a little stub driver working around the fact that the EDAC maintainers prefer their drivers to be structured in a certain way that doesn't fit the SiFive SOCs. Move the file to drivers/soc and add a Kconfig option for it, as well as the whole drivers/soc boilerplate for CONFIG_SOC_SIFIVE. Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs") Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Borislav Petkov <bp@suse.de> [paul.walmsley@sifive.com: keep the MAINTAINERS change specific to the L2$ controller code] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'drivers/soc/sifive/Makefile')
-rw-r--r--drivers/soc/sifive/Makefile3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/soc/sifive/Makefile b/drivers/soc/sifive/Makefile
new file mode 100644
index 000000000000..b5caff77938f
--- /dev/null
+++ b/drivers/soc/sifive/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_SIFIVE_L2) += sifive_l2_cache.o