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author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-08-08 23:29:00 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-08-08 23:29:00 +0200 |
commit | 507f811f205c17fd6f64e8d34d4bf91cd01b07a2 (patch) | |
tree | 72f4abfa45964c4cb4f06cdaaf463fd84e5e7581 /drivers/soc | |
parent | Merge tag 'thermal-5.20-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff) | |
parent | Merge branch 'pm-cpufreq' (diff) | |
download | linux-507f811f205c17fd6f64e8d34d4bf91cd01b07a2.tar.xz linux-507f811f205c17fd6f64e8d34d4bf91cd01b07a2.zip |
Merge tag 'pm-5.20-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more power management updates from Rafael Wysocki:
"These are ARM cpufreq updates and operating performance points (OPP)
updates plus one cpuidle update adding a new trace point.
Specifics:
- Fix return error code in mtk_cpu_dvfs_info_init (Yang Yingliang).
- Minor cleanups and support for new boards for Qcom cpufreq drivers
(Bryan O'Donoghue, Konrad Dybcio, Pierre Gondois, and Yicong Yang).
- Fix sparse warnings for Tegra cpufreq driver (Viresh Kumar).
- Make dev_pm_opp_set_regulators() accept NULL terminated list
(Viresh Kumar).
- Add dev_pm_opp_set_config() and friends and migrate other users and
helpers to using them (Viresh Kumar).
- Add support for multiple clocks for a device (Viresh Kumar and
Krzysztof Kozlowski).
- Configure resources before adding OPP table for Venus (Stanimir
Varbanov).
- Keep reference count up for opp->np and opp_table->np while they
are still in use (Liang He).
- Minor OPP cleanups (Viresh Kumar and Yang Li).
- Add a trace event for cpuidle to track missed (too deep or too
shallow) wakeups (Kajetan Puchalski)"
* tag 'pm-5.20-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (55 commits)
cpuidle: Add cpu_idle_miss trace event
venus: pm_helpers: Fix warning in OPP during probe
OPP: Don't drop opp->np reference while it is still in use
OPP: Don't drop opp_table->np reference while it is still in use
cpufreq: tegra194: Staticize struct tegra_cpufreq_soc instances
dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6375 compatible
dt-bindings: opp: Add msm8939 to the compatible list
dt-bindings: opp: Add missing compat devices
dt-bindings: opp: opp-v2-kryo-cpu: Fix example binding checks
cpufreq: Change order of online() CB and policy->cpus modification
cpufreq: qcom-hw: Remove deprecated irq_set_affinity_hint() call
cpufreq: qcom-hw: Disable LMH irq when disabling policy
cpufreq: qcom-hw: Reset cancel_throttle when policy is re-enabled
cpufreq: qcom-cpufreq-hw: use HZ_PER_KHZ macro in units.h
cpufreq: mediatek: fix error return code in mtk_cpu_dvfs_info_init()
OPP: Remove dev{m}_pm_opp_of_add_table_noclk()
PM / devfreq: tegra30: Register config_clks helper
OPP: Allow config_clks helper for single clk case
OPP: Provide a simple implementation to configure multiple clocks
OPP: Assert clk_count == 1 for single clk helpers
...
Diffstat (limited to 'drivers/soc')
-rw-r--r-- | drivers/soc/tegra/common.c | 49 | ||||
-rw-r--r-- | drivers/soc/tegra/pmc.c | 4 |
2 files changed, 35 insertions, 18 deletions
diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c index 32c346b72635..dff6d5ef4e46 100644 --- a/drivers/soc/tegra/common.c +++ b/drivers/soc/tegra/common.c @@ -107,30 +107,47 @@ int devm_tegra_core_dev_init_opp_table(struct device *dev, { u32 hw_version; int err; - - err = devm_pm_opp_set_clkname(dev, NULL); - if (err) { - dev_err(dev, "failed to set OPP clk: %d\n", err); - return err; - } - - /* Tegra114+ doesn't support OPP yet */ - if (!of_machine_is_compatible("nvidia,tegra20") && - !of_machine_is_compatible("nvidia,tegra30")) - return -ENODEV; - - if (of_machine_is_compatible("nvidia,tegra20")) + /* + * The clk's connection id to set is NULL and this is a NULL terminated + * array, hence two NULL entries. + */ + const char *clk_names[] = { NULL, NULL }; + struct dev_pm_opp_config config = { + /* + * For some devices we don't have any OPP table in the DT, and + * in order to use the same code path for all the devices, we + * create a dummy OPP table for them via this. The dummy OPP + * table is only capable of doing clk_set_rate() on invocation + * of dev_pm_opp_set_rate() and doesn't provide any other + * functionality. + */ + .clk_names = clk_names, + }; + + if (of_machine_is_compatible("nvidia,tegra20")) { hw_version = BIT(tegra_sku_info.soc_process_id); - else + config.supported_hw = &hw_version; + config.supported_hw_count = 1; + } else if (of_machine_is_compatible("nvidia,tegra30")) { hw_version = BIT(tegra_sku_info.soc_speedo_id); + config.supported_hw = &hw_version; + config.supported_hw_count = 1; + } - err = devm_pm_opp_set_supported_hw(dev, &hw_version, 1); + err = devm_pm_opp_set_config(dev, &config); if (err) { - dev_err(dev, "failed to set OPP supported HW: %d\n", err); + dev_err(dev, "failed to set OPP config: %d\n", err); return err; } /* + * Tegra114+ doesn't support OPP yet, return early for non tegra20/30 + * case. + */ + if (!config.supported_hw) + return -ENODEV; + + /* * Older device-trees have an empty OPP table, we will get * -ENODEV from devm_pm_opp_of_add_table() in this case. */ diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 5611d14d3ba2..6a4b8f7e7948 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -1384,7 +1384,7 @@ tegra_pmc_core_pd_opp_to_performance_state(struct generic_pm_domain *genpd, static int tegra_pmc_core_pd_add(struct tegra_pmc *pmc, struct device_node *np) { struct generic_pm_domain *genpd; - const char *rname = "core"; + const char *rname[] = { "core", NULL}; int err; genpd = devm_kzalloc(pmc->dev, sizeof(*genpd), GFP_KERNEL); @@ -1395,7 +1395,7 @@ static int tegra_pmc_core_pd_add(struct tegra_pmc *pmc, struct device_node *np) genpd->set_performance_state = tegra_pmc_core_pd_set_performance_state; genpd->opp_to_performance_state = tegra_pmc_core_pd_opp_to_performance_state; - err = devm_pm_opp_set_regulators(pmc->dev, &rname, 1); + err = devm_pm_opp_set_regulators(pmc->dev, rname); if (err) return dev_err_probe(pmc->dev, err, "failed to set core OPP regulator\n"); |