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authorMark Brown <broonie@kernel.org>2022-11-25 22:26:21 +0100
committerMark Brown <broonie@kernel.org>2022-11-25 22:26:21 +0100
commit79dfd9d5e8b5cab454ab8fafdfaed0c82b2e2f4b (patch)
tree5f74933ed61c9319437932db31a50c116dee043d /drivers/soundwire
parentASoC: mediatek: mtk-btcvsd: Add checks for write and read of mtk_btcvsd_snd (diff)
parentASoC: adau1372: add support for S24_LE mode (diff)
downloadlinux-79dfd9d5e8b5cab454ab8fafdfaed0c82b2e2f4b.tar.xz
linux-79dfd9d5e8b5cab454ab8fafdfaed0c82b2e2f4b.zip
ASoC: adau1372: fixes after debugging custom board
Merge series from Maarten Zanders <maarten.zanders@mind.be>: A collection of fixes and improvements for the adau1372 driver.
Diffstat (limited to 'drivers/soundwire')
-rw-r--r--drivers/soundwire/intel.c1
-rw-r--r--drivers/soundwire/qcom.c9
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c
index 244209358784..8c76541d553f 100644
--- a/drivers/soundwire/intel.c
+++ b/drivers/soundwire/intel.c
@@ -1513,6 +1513,7 @@ static int intel_link_probe(struct auxiliary_device *auxdev,
bus->link_id = auxdev->id;
bus->dev_num_ida_min = INTEL_DEV_NUM_IDA_MIN;
+ bus->clk_stop_timeout = 1;
sdw_cdns_probe(cdns);
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index b33d5db494a5..cee2b2223141 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -344,6 +344,9 @@ static int qcom_swrm_cmd_fifo_wr_cmd(struct qcom_swrm_ctrl *swrm, u8 cmd_data,
if (swrm_wait_for_wr_fifo_avail(swrm))
return SDW_CMD_FAIL_OTHER;
+ if (cmd_id == SWR_BROADCAST_CMD_ID)
+ reinit_completion(&swrm->broadcast);
+
/* Its assumed that write is okay as we do not get any status back */
swrm->reg_write(swrm, SWRM_CMD_FIFO_WR_CMD, val);
@@ -377,6 +380,12 @@ static int qcom_swrm_cmd_fifo_rd_cmd(struct qcom_swrm_ctrl *swrm,
val = swrm_get_packed_reg_val(&swrm->rcmd_id, len, dev_addr, reg_addr);
+ /*
+ * Check for outstanding cmd wrt. write fifo depth to avoid
+ * overflow as read will also increase write fifo cnt.
+ */
+ swrm_wait_for_wr_fifo_avail(swrm);
+
/* wait for FIFO RD to complete to avoid overflow */
usleep_range(100, 105);
swrm->reg_write(swrm, SWRM_CMD_FIFO_RD_CMD, val);