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author | Dave Kleikamp <shaggy@linux.vnet.ibm.com> | 2011-01-26 07:17:59 +0100 |
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committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2011-02-02 12:59:02 +0100 |
commit | 21a06b0459f5e3ecdeccacfbf076c229514c1840 (patch) | |
tree | 2910d16ee073ab722e65eae7373519e64dc5179d /drivers/spi/ath79_spi.c | |
parent | powerpc/476: define specific cpu table entry DD2 core (diff) | |
download | linux-21a06b0459f5e3ecdeccacfbf076c229514c1840.tar.xz linux-21a06b0459f5e3ecdeccacfbf076c229514c1840.zip |
powerpc/476: Workaround for PLB6 hang
The 476FP core may hang if an instruction fetch happens during an msync
following a tlbsync. This workaround makes sure that enough instruction
cache lines are pre-fetched before executing the msync. (sync and msync
are the same to the compiler.)
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'drivers/spi/ath79_spi.c')
0 files changed, 0 insertions, 0 deletions