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authorDavid Brownell <david-b@pacbell.net>2007-07-17 13:04:02 +0200
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-17 19:23:04 +0200
commitdccd573bb02aa011a4a7146c02c409ac0bd722a0 (patch)
tree743eeca4fbbea8272ca4f341b806d776e404d704 /drivers/spi/mpc52xx_psc_spi.c
parentIBMASM: must depend on CONFIG_INPUT (diff)
downloadlinux-dccd573bb02aa011a4a7146c02c409ac0bd722a0.tar.xz
linux-dccd573bb02aa011a4a7146c02c409ac0bd722a0.zip
SPI controller drivers: check for unsupported modes
Minor SPI controller driver updates: make the setup() methods reject spi->mode bits they don't support, by masking aginst the inverse of bits they *do* support. This insures against misbehavior later when new mode bits get added. Most controllers can't support SPI_LSB_FIRST; more handle SPI_CS_HIGH. Support for all four SPI clock/transfer modes is routine. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/spi/mpc52xx_psc_spi.c')
-rw-r--r--drivers/spi/mpc52xx_psc_spi.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/spi/mpc52xx_psc_spi.c b/drivers/spi/mpc52xx_psc_spi.c
index 11f36bef3057..d2a4b2bdb07b 100644
--- a/drivers/spi/mpc52xx_psc_spi.c
+++ b/drivers/spi/mpc52xx_psc_spi.c
@@ -270,6 +270,9 @@ static void mpc52xx_psc_spi_work(struct work_struct *work)
spin_unlock_irq(&mps->lock);
}
+/* the spi->mode bits understood by this driver: */
+#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST)
+
static int mpc52xx_psc_spi_setup(struct spi_device *spi)
{
struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
@@ -279,6 +282,12 @@ static int mpc52xx_psc_spi_setup(struct spi_device *spi)
if (spi->bits_per_word%8)
return -EINVAL;
+ if (spi->mode & ~MODEBITS) {
+ dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
+ spi->mode & ~MODEBITS);
+ return -EINVAL;
+ }
+
if (!cs) {
cs = kzalloc(sizeof *cs, GFP_KERNEL);
if (!cs)